Monday, October 20, 2014

Synopsys intros industry's first on-chip memory test and repair solution for embedded flash

MOUNTAIN VIEW, USA: Synopsys Inc. introduced the DesignWare STAR Memory System® for Embedded Flash product, the industry's first integrated memory test and repair solution with test algorithms optimized for on-chip embedded flash memories.

The DesignWare STAR Memory System is an automated pre- and post-silicon memory test, diagnostic and repair solution that enables designers to improve test coverage, reduce design time, lower test costs and maximize manufacturing yield. The STAR Memory System for Embedded Flash is a built-in self-test (BIST) solution that tests for the failure mechanisms associated with embedded flash memories, reducing overall integration time and cutting associated test costs by 20 percent compared to external solutions.

Embedded flash memories are increasingly used with microcontrollers in system-on-chips (SoCs) for Internet of Things (IoT) wearables, smart appliances and automotive safety systems, which have stringent cost and reliability requirements.

"Synopsys' DesignWare STAR Memory System for Embedded Flash is a valuable product for chip designers utilizing our highly popular 55-nanometer process, which has already been widely adopted for numerous IoT applications," said Shih Chin Lin, senior director of IP development and design support division at UMC.

"This solution provides our mutual customers with integrated test and repair capabilities that reduce overall design effort and lower test costs. Designers who are taking advantage of our 55-nanometer eFlash process will find that the post-silicon debug and analysis capabilities of Synopsys' Yield Accelerator and Silicon Browser will make designers' product characterization and validation efforts even more efficient."

The STAR Memory System for Embedded Flash offers in-field diagnostic capabilities to identify issues during system operation. With these capabilities, memory issues can be diagnosed even after the devices have shipped to the end customer.

The STAR Memory System allows hierarchical generation and verification of the test and repair IP to be inserted into the SoC while maintaining the original design hierarchy. This can reduce integration effort and SoC development time by allowing reuse of existing design constraints and configuration files.

Additionally, the post-silicon Yield Accelerator and Silicon Browser features can reduce the time required for silicon bring-up and defect analysis for yield optimization, enabling the ramp to volume production to occur in weeks rather than months. Used in billions of chips, the STAR Memory System is a two-time winner of Test & Measurement World's prestigious "Best in Test" Award.

"SoC designers for IoT and automotive devices must implement cost-effective features that enable efficient test and diagnostics for the full life cycle of their products," said John Koeter, VP of marketing for IP and prototyping at Synopsys.

"Testing embedded flash memories has historically required expensive external test solutions. With STAR Memory System for Embedded Flash, designers can reduce their test cost and development schedules, getting their products to market faster."

VIA Technologies cuts silicon test time by 11X using Synopsys' DFTMAX Ultra

MOUNTAIN VIEW, USA: Synopsys Inc. announced that VIA Technologies, the foremost fabless supplier of power efficient x86 processor platforms, successfully taped out a system-on-chip (SoC) design using Synopsys' DFTMAX Ultra compression, meeting test time and quality goals.

The need to shorten test time in conjunction with increasing design complexity drove VIA Technologies requirement for higher test compression. DFTMAX Ultra and Synopsys' TetraMAX ATPG delivered 11X higher compression while maintaining high test quality and requiring only one week to deploy. As a result, VIA Technologies has standardized on DFTMAX Ultra and TetraMAX for all pin-limited designs.

"DFTMAX Ultra delivered 11X higher compression on our pin-limited design, which allowed us to meet our manufacturing test goals," said JC Chen, design service manager of the Hardware Technology Development Center at VIA Technologies.

"We were able to incorporate DFTMAX Ultra into our design flows within a few days without impacting our stringent schedules. Due to the superior results DFTMAX Ultra delivers, we will be using it for all our pin-limited designs."

Design teams are under pressure to ensure high manufacturing defect coverage while facing multiple factors that reduce the number of pins available for test. These include designs such as mobile applications that are pin-limited, large SoCs that have few pins per core for test access, as well as a technique known as multisite testing that checks for defects across multiple dies simultaneously.

Companies like VIA Technologies are deploying DFTMAX Ultra to address the increased costs typically associated with pin-limited testing. By achieving significantly higher compression than previous technologies, DFTMAX Ultra enables high defect coverage utilizing as few as one pair of test pins. Built into Design Compiler, DFTMAX Ultra synthesizes the test compression logic into a design, then sets up Synopsys TetraMAX ATPG to generate high defect-coverage, power-aware test programs.

"A growing number of semiconductor companies, such as VIA Technologies, are adopting DFTMAX Ultra to aggressively cut test time and maintain high test quality," said Bijan Kiani, VP of marketing for Synopsys' Design Group. "With innovative compression technology and value links to other products in the Synopsys Galaxy™ Design Platform, DFTMAX Ultra is helping our customers meet their most challenging design and test goals faster."

Altera demos automotive embedded system solutions that increase design productivity at SAE Convergence 2014

SAN JOSE & DETROIT, USA: Altera Corp. announced it is demonstrating new field-programmable gate array (FPGA) solutions enabling systems designers to rapidly add features and functionality to their automotive systems designs at SAE Convergence in Detroit, Michigan from October 21 to 22 in Booth #313.

The demonstrations include a variety of new solutions for advanced driver assistance systems (ADAS) and infotainment applications on Cyclone FPGAs.

Altera offers solutions that accelerate design times and improve design productivity by eliminating the need to write code in traditional RTL. Designers can target Cyclone V SoCs using the Altera SDK for OpenCL, an industry-standard software-based design flow that reduces development time from months to days by allowing designers to use a familiar software programming language such as C instead of the traditional VHDL or Verilog.

Similarly, engineers can leverage Altera’s DSP Builder tool to develop algorithms in MATLAB/Simulink, and port them to an FPGA without the need to write RTL code.

Altera takes a holistic approach to functional safety. By targeting ISO 26262 certification for Altera’s Quartus II design tools, FPGAs and associated safety diagnostics IP, Altera offers designers 12 to 18 months of development time savings compared to non-certified offerings.

Additional Cyclone V SoC features such as 16- and 32-bit DDR memory interfaces with hardened error correction code (ECC) provide the lowest latency and highest reliability memory interfaces critical to embedded vision and video processing applications.

To complement our functional safety offering, Altera is introducing the first ever automotive open-system architecture (AUTOSAR) version 4.0.3 microcontroller abstraction layer (MCAL) solution for programmable logic, a solution available for Cyclone V SoC FPGAs.

AUTOSAR helps improve automotive design productivity by abstracting the application software code from the underlying hardware. Altera’s ready-built MCAL was developed with an ISO 26262 ASIL B compliant safety-level methodology, to provide a streamlined foundation for our customers to rapidly innovate and differentiate their safety-critical applications.

AT&S, Soundchip, and ST craft innovative bionic ear

SWITZERLAND: AT&S, a leader in advanced packaging solutions, Soundchip SA, a Swiss-based innovator in wearable sound technology, and STMicroelectronics announced their collaboration in innovating a bionic hearing module that, when installed into a personal audio device, delivers an amazing wearable sound experience controlled at the ear by the wearer and software intelligence.

Personal audio devices, like an MP3 player or smartphone, equipped with the bionic hearing module, provide wearers with the ability to electronically “open” and “close” their ears to ambient sound conditions, or even to augment ambient sound with programmed audio from a connected smart device.

This capability can fully protect wearers from noise in situations where the ambient sound is too loud, or to open the ear for natural conversation with others, without having to remove the audio device, suffer from the discomfort of occlusion, or worse, the pain of loud noise.

The bionic hearing module integrates a broad spectrum of advanced electronics to further enhance the on-the-go audio experience, including head-tracking and other sensing, to enable exciting new features, including augmented-audio guidance and biometric monitoring.

The multi-mode audio capabilities of the bionic hearing module are enabled through the use of HD-PA®technology developed by Soundchip. Their implementation in a compact form factor is made possible through the use of patented Soundstrate® technology, which enables the efficient combination of electronic, acoustic, and transmission means within a single, compact mechanical structure.

The semiconductor components in the bionic hearing module comprise the latest Motion and Audio MEMS (Micro-Electro-Mechanical System) components from STMicroelectronics, an HD-PA®-compliant Audio Engine for zero-latency sound processing, and an ultra-low-power STM32 MCU from ST’s industry-leading portfolio of more than 500 32-bit ARM® Cortex®-M-core microcontrollers.

Worldwide semiconductor capital spending to increase by more than 11 percent in 2014

USA: Worldwide semiconductor capital spending is projected to total $64.5 billion in 2014, an increase of 11.4 percent from 2013 spending of $57.8 billion, according to Gartner, Inc. Capital equipment spending will increase 17.1 percent in 2014, driven by strong memory average selling prices and increased demand for consumer products.

For 2014, Gartner's forecast for semiconductor equipment has been increased slightly from the previous forecast. Longer term, Gartner expects modest growth through the semiconductor cycle, with just a modest pause in the equipment market expected in 2016.
"While capital spending outperformed equipment spending in 2013, the reverse will hold true for 2014," said David Christensen, senior research analyst at Gartner. "Total capital spending will grow 11.4 percent in 2014, compared with 7.1 percent in our prior forecast — a result of Samsung increasing its announced spending plans to $14 billion. Equipment spending will increase 17.1 percent, as manufacturers pull back on new fab construction and concentrate on ramping up new capacity instead."

In recent years, the equipment industry has realized significant consolidation, as major vendors have acquired complementary and competitive companies. As equipment advancements will lead to higher development costs, the trend of industry consolidation should be expected to continue.

Foundries will continue to outspend the logic integrated device manufacturers (IDMs) in 2014. Foundry spending is expected to increase by 4.5 percent in contrast with the 0.3 percent decrease in total logic spending. However, the longer-term outlook for total foundry spending shows a flat profile, as predicted mobility market saturation will dampen the need for new foundry capacity and creates an environment where existing capacity is upgraded to the latest node.

The memory capital expenditure (capex) outlook remains strong for 2014 with a 40 percent increase anticipated in the current forecast, compared with a 25 percent increase in the previous quarter's forecast. Memory manufacturers are currently enjoying a strong pricing environment, which sets the stage for renewed spending growth.

The current DRAM undersupply will continue through 2015, moving back into an oversupply in 2016 as new wafer capacity is added to the market. Since the last forecast Samsung Electronics has announced that it will be using one floor of its newly completed S3 fab in Suwon, South Korea, for DRAM production.

In late December 2013, SK Hynix announced that it would invest $1.7 billion at its Icheon, South Korea, complex to build a new fab shell and clean room. This leaves a scenario in which both of the South Korean vendors are bringing on new DRAM wafer capacity, pushing bit supply growth to 36 percent in 2016. This combined with the mild demand growth in the same period moves the market into oversupply.

Friday, October 17, 2014

MediaTek MT8507 connected audio SoC receives Spotify certification

TAIWAN: MediaTek announced that its Connected Audio System on Chip (SoC), MT8507, is certified with Spotify Connect. It supports an enhanced home audio experience that lets end users play millions of tracks seamlessly through their speakers and smart TVs, using the Spotify app on their mobile or tablet as a remote.
         
“We’re pleased to add MediaTek as one of our partners in our ever growing ecosystem. Spotify Connect is a relatively new feature that we’ve added into our arsenal just over a year ago,” said Mikael Ericsson, director of Product, Home & Automotive of Spotify.

“With MediaTek’s technological expertise in both audio products and smart TVs, this partnership will surely help us further our goal to provide a seamless and hassle free home music listening experience controlled from your Spotify application to every music fan on the planet.”

MT8507 is the first MediaTek Connected Audio SoC to support Spotify connectivity. Based on ARM® Cortex®-A7 processer, the SoC enables speakers to surpass the aggressive performance standards of Spotify Connect by cutting the latency almost in half as compared with the requirements. With the high-performance of MT8507, users will enjoy their music through the speakers disruption-free.

“We are committed to delivering high-performance, accessible and easy to use technology to consumers, including a wide range of quality solutions such as chipsets for smart TVs, audio devices and wireless connectivity to provide users with a complete connected experience,” said Joe Chen, SVP and GM of MediaTek's Home Entertainment Business Unit.

“Spotify is one of the world’s most popular music streaming services, and we’re happy to support it in our SoCs as we continue to create technology that deliver a great experience for everyone around the world.”

MT8507 has already entered into mass production. Consumers may expect MediaTek-powered speakers with Spotify Connect capabilities to hit the market before the end of year.

Analog Devices delivers industry’s highest signal bandwidth with dual 16-bit D/A converter

USA: Analog Devices Inc. has introduced an industry first 2.8-GSPS dual 16-bit converter for telecommunications system manufacturers that require microwave frequencies in point-to-point wireless backhaul equipment.

The 16-bit AD9136 and 11-bit AD9135 dual D/A converters achieve up to 70 percent higher signal bandwidth than competing devices while enabling designers to support emerging E-band (71-76 GHz and 81-86 GHz) frequencies being adopted by wireless carriers to support steadily increasing demand for high-speed mobile voice and data transfers.

The new converters have a maximum sample rate of 2.8 GSPS, which allows multicarrier generation up to the Nyquist frequency.

The AD9136/5 D/A converters support complex input data rates of up to 2.12 GSPS per D/A converter using a flexible, 8-lane, 10.6 Gbps JESD204B interface. The new devices achieve better than -80dBc spurious-free dynamic range (SFDR) and have exceptional noise performance of -163dBm/Hz that provide high quality synthesis of wideband signals.

The industry-leading combination of speed and noise performance results in faster, cleaner data transmission and reduces infrastructure costs by allowing wireless carriers to space point-to-point microwave repeaters farther apart.

Microsemi reaches major milestone by shipping over 1 billion voice line circuits

ALISO VIEJO, USA: Microsemi Corp. has reached a major milestone by shipping over 1 billion voice line circuits. This achievement comes after more than three decades of worldwide industry leadership in providing reliable and cost competitive voice solutions.

With over 65 percent market share in voice line circuit solutions for VoIP enabled broadband gateways, Microsemi continues to develop easy-to-use and highly cost-effective voice line solutions with a wide array of products such as the next generation miSLIC™ Series, the ZL880, and VE950 product families.

Microsemi's latest line circuit devices are optimized for short loop, power sensitive applications and provide the highest level of integration available today. Target applications include cable embedded multimedia terminal adaptors (eMTAs), DSL integrated access devices (IADs), fiber to the premise (FTTx) applications, LTE gateways and analog terminal adaptors (ATAs).

According to Infonetics Research, broadband providers continue to increase the number of services offered (including voice) which will continue to drive the CPE market at volumes around 200 million units per year for the next five to seven years.

Mobile and wearable market will reach 2.9 billion units by 2018

USA: The markets for wearable devices, smartphones and tablet PCs are large and growing quickly.  By 2018 sensor sales into mobile devices and wearables will reach $28.3 billion. There are over 75 sensor vendors targeting these markets. More sensors are being designed in which enable new features and functions.

In its most recent report, "Sensors in Wearables and Mobile: The Many Players", Semico Research examines the large number of sensor vendors, both MEMS and non-MEMS. Semico has identified 11 MEMS-type and 12 non-MEMS type sensors used in wearables, smartphones and tablet PCs. The technologies and suppliers presented may also be used in other applications.

This report presents the forecasts for the end use markets and the adoption rates of different sensors. Sensor fusion is a major driver. This technology is a combination of software and hardware. Data from an increasing number of sensors drives further innovation as device manufacturers look to develop more context awareness and other applications such as improved motion tracking, gesture recognition, navigation, augmented reality and biometrics.

"Both MEMS and non-MEMS sensors are complementary in wearables and mobile devices," said Tony Massimini, Semico's Chief of Techonology. "But there is also competition as some MEMS sensors are likely to replace non-MEMS sensors."

The report, "Sensors in Wearables and Mobile: The Many Players", examines the top vendors and the breadth of their product offerings. However, there are many small and emerging companies which are addressing specialized technologies such as environmental and biological factors. The report includes the many vendors across the wide variety of sensors available.  Semico presents the TAM by sensor type for each of these markets. The competitive landscape is also discussed and how this will impact future developments.

Some of the findings include:
* The total number of mobile and wearable devices will grow to 2.9 billion units by 2018.
* The average number of sensors per device will grow from 10 in 2014 to 13 in 2018.
* There are over 75 sensor vendors targeting mobile and wearable devices.
* MEMS microphones is the leading sensor type by volume.

Thursday, October 16, 2014

Intel and IBM lay out 14nm FinFET strategies on competing substrates

SAN FRANCISCO, USA: The development of increasingly sophisticated and energy-efficient CMOS technology for mobile, client and cloud computing depends on a continuing stream of advances in the process technologies with which the complex integrated circuits are built.

Among the most promising chip technologies are transistors called FinFETs, which have attracted significant R&D investment and have begun to appear in commercial products.

But the technology is complex and the path forward isn't settled, and in two late-news papers to be given at this December's IEEE International Electron Devices Meeting (IEDM), Intel and IBM will present dueling approaches to the development of FinFET technology for the 14nm technology node, the semiconductor industry's next big hurdle.

The IEDM is the world's premier forum where top technical experts in micro- and nanoelectronics gather to disclose, discuss and debate breakthrough technologies in the field. The 60th annual IEDM will be held at the Hilton San Francisco Union Square Hotel from December 15-17, 2014, preceded by day-long short courses on Sunday, Dec. 14 and a program of 90-minute tutorials on Saturday, Dec. 13.

All modern transistors have a channel to conduct electricity and one or more gates to turn the current on and off. FinFETs have long, thin fin-like channels (hence the name) surrounded by multiple gates. This design leads to greater performance and enhanced energy efficiency. Both Intel and IBM will present fully integrated 14nm FinFET technologies at the IEDM.

Intel, which began using FinFET transistors commercially in its "Ivy Bridge" and "Haswell" processors at the 22nm node, will detail the second generation of that technology.(i) Made on a standard bulk silicon substrate, the new "Broadwell" 14nm technology has been released commercially and is in production as part of Intel's latest family of microprocessors.

Among the technical features Intel will discuss at the IEDM are: a novel doping technique to prevent current leakage under the fins and to maintain very low doped fins, resulting in improvement in variation; two levels of air-gap-insulated interconnects (electrical connections) at ultra-narrow 80 and 160nm minimum pitches, yielding a 17 percent reduction in capacitance delays; eight layers of 52nm pitch interconnects embedded in low-k dielectrics; an embedded 140Mb SRAM memory with a tiny cell size of 0.0588µm2; and saturated drive currents significantly higher than for Intel's 22nm first-generation FinFETs (improvements of 15 percent and 41 percent for NMOS and PMOS transistors, respectively). The transistors operate with a supply voltage of only 0.7 Volts.

The researchers also will discuss how aggressive design rules enabled the production of very high aspect ratio rectangular fins (8nm wide and 42nm high) at unprecedented levels of uniformity.

IBM, meanwhile, will describe a very different approach to 14nm FinFET transistors. The IBM devices are made not from a standard bulk silicon substrate but from an insulating substrate known as SOI, a more expensive material but one which simplifies manufacturing in terms of device isolation. These devices are more than 35% faster than IBM’s 22nm planar (i.e. standard, non-FinFET) transistors, with an operating voltage of just 0.8 volts.

The IBM technology features what may be the smallest, densest embedded DRAM memory ever demonstrated (a cell size of just 0.0174µm2) for high-speed performance in a fully integrated process flow. IBM also designed an elegant way to make the technology suitable for both low-power and high-speed applications, using a unique dual-workfunction process that optimizes the threshold voltages of both NMOS and PMOS transistors without any mobility degradation in the channel.

Because the technology is envisioned for use in system-on-a-chip (SoC) applications ranging from video game consoles to enterprise-level corporate data centers, the IBM design also features a record 15 levels of copper interconnect to give circuit designers more freedom that ever before to distribute power and clock signals efficiently across an entire SoC chip, which may be as large as 600mm2.

Making transistors smaller, or scaling them according to Moore's Law, is what has traditionally driven exponential progress in nanoelectronics and information technology. With today's nanoscale-sized devices that has become difficult and expensive, which is why new transistor architectures such as FinFETs have become so appealing.

Wearable sensor market to expand seven-fold in five years

EL SEGUNDO, USA: Driven by rising demand for fitness and health monitoring features as well as by improved user interfaces, shipments of sensors used in wearable electronic devices will rise by a factor of seven from 2013 through 2019, according to IHS Technology.

The worldwide market for sensors in wearables will expand to 466 million units in 2019, up from 67 million in 2013.

Shipments of sensors will climb much more quickly than the market for the wearable devices themselves. Wearable devices will increase to 135 million units in 2019, less than three times the total of 50 million in 2013.

“Wearables are a hotbed for sensors, with market growth driven by the increasing number of these components in each product sold,” said Jérémie Bouchaud, director and senior principal analyst, MEMS & Sensors, at IHS Technology.

“The main factor propelling this phenomenon is a transition in market share away from simple products like pedometers and toward more sophisticated multipurpose devices such as smartwatches and smartglasses. Instead of using a single sensor like the simpler devices, the more complex products employ numerous components for health and activity monitoring, as well as for their more advanced user interfaces.”

The average wearable device shipped in 2019 will incorporate 4.1 sensor elements, up from 1.4 in 2013.

Smartphone brands are increasingly aware that wearables are a better platform for some types of sensors than mobile handsets. IHS expects components like humidity sensors and pulse sensors to move from handsets to wearable devices, such as new smartwatches introduced by Samsung, Apple and others. This will further boost shipments of sensors in wearables.

This information is derived from the new IHS report entitled “MEMS & Sensors for Wearables Report – 2014” from the IHS MEMS & Sensors service.

Sensor scan
The types of sensors used in wearables are motion sensors, microelectromechanical systems (MEMS) and sensors for user interfaces, health sensors and environmental sensors.

Motion sensors represent the dominant technology in the wearables segment and comprise the component categories of accelerometers, gyroscopes, magnetometers, pressure sensors and combo motion sensors. MEMS sensors for user interfaces include MEMS microphones, proximity sensors and MEMS displays.

The health sensor area is represented by pulse, pulse-oximeters, hydration and skin temperature sensors. Environmental sensors include humidity, temperature and ultraviolet (UV) components.

Sensing opportunity
Wearables increasingly are employing sensors for fitness monitoring, using motion sensors or health sensors. The wearable devices also are implementing fitness and health monitoring using motion sensors or health sensors like pulse sensors. On the user interface front, wearables use MEMS microphones for voice command and motion sensors for tap command.

“The use of these types of sensors reflects consumer preferences that are propelling the growth of the wearables market,” Bouchaud said. “Users want health and fitness monitoring, and they want wearable devices that act as extensions of their smartphones. However, there’s no real demand from consumers for environmental sensors. Instead, the rising adoption of environmental sensors such as humidity and UV devices is being pushed by both sensor suppliers and wearable original equipment manufacturers (OEM).”

Watching the market
The market for sensors in wearables will undergo a major acceleration next year as shipments of the Apple Watch commence. Overall wearable sensor shipments will double next year; shipments of sensors for smartwatches will surge by nearly 600 percent.

The Apple Watch not only employs an accelerometer, but also a gyroscope, a microphone and a pulse sensor.

“Similar to the iPhone and iPad, IHS expects the Apple Watch will set a de facto standard for sensor specifications in smartwatches,” Bouchaud said. “Most other wearable OEMs will follow Apple’s lead in using these four devices—or will add even more sensors to differentiate.”

Fitness and heart rate monitors and foot pods and pedometers lead the wearable market in terms of sensor shipments in 2013.

However, smartwatches will take the top position starting next year and will maintain dominance through 2019.

STMicroelectronics dominates sensors
STMicroelectronics is by far the top MEMS and sensor supplier for the wearable market. The company consolidated its leadership position in 2013 with a 26 percent share of revenue, up from 20 percent in 2012.

Beside its leadership in the discrete accelerometer market, STMicroelectronics’ success with wearable sensors is because of its strong bundling strategy. The company often sells its sensors as part of a packaged deal along with its other semiconductor offerings, such as 32-bit microcontrollers and wireless chips.

Altera expands automotive-grade product portfolio with highly integrated PowerSoCs

SAN JOSE, USA: Altera Corp. announced nine new Altera Enpirion power system-on-chip (PowerSoC) devices that fully comply with the Automotive Electronics Council (AEC-Q100) qualification standard temperature grade 2, a critical stress test qualification for automotive integrated circuits (ICs).

The newly qualified Enpirion devices include step-down PowerSoCs from the EP53xx and efficiency-optimized EN63xx families, supporting load currents up to 12 amps.

Unlike discrete power products, these turnkey solutions give designers complete power systems that are fully simulated, characterized and production-qualified, streamlining the design-in process and making it much faster. These pre-tested power solutions are ideal for use with Altera’s automotive-grade Cyclone® FPGAs and SoCs and MAX® FPGAs and CPLDs.
 
 “Our automotive-grade Enpirion PowerSoCs are specified, simulated, characterized, validated and manufacturing-tested as a complete power system. Fewer components and a tightly controlled IC manufacturing processes permit an unsurpassed 45,000-year mean time between failures (MTBF) reliability,” said Dan McNamara, VP of Altera’s Automotive Business Unit. “By designing with these optimized, proven solutions, our customers can simplify their semiconductor supply chain, minimize bill of materials and accelerate time to market.”

FPGAs and PowerSoCs Enable Next Generation Automotive Electronics
ADAS designers are increasingly turning to FPGAs to run their algorithms at higher frame rates, process multiple algorithms simultaneously and adapt to the latest trends. This makes thermal performance, energy efficiency, integration and small footprint critical attributes to a winning design.

By integrating the inductors, high-frequency filter capacitors, controller, and MOSFETs, Altera’s Enpirion PowerSoCs typically have a 25 to 50 percent smaller footprint compared to alternative discrete switching regulators and modules. Altera is the only programmable logic supplier to offer both FPGAs and PowerSoCs to the automotive market, making it easier for customers to leverage Altera as a one-stop shop for their automotive designs.